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IEC 63011-1-ed.1.0
Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology
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STANDARD published on 28.11.2018
The information about the standard:
Designation standards: IEC 63011-1-ed.1.0
Publication date standards: 28.11.2018
SKU: NS-906033
The number of pages: 24
Approximate weight : 72 g (0.16 lbs)
Country: International technical standard
Category: Technical standards IEC
The category - similar standards:
Annotation of standard text IEC 63011-1-ed.1.0 :
IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided. LIEC 63011-1:2018 donne des definitions relatives aux circuits integres multipuces constitues de puces empilees verticalement a laide de trous de liaison a travers le silicium ou de microbosses. Des termes et definitions relatifs a la fabrication et aux essais des circuits integres multipuces sont egalement fournis.
