Standard IEC 63602-ed.1.0 9.2.2026 preview

IEC 63602-ed.1.0

Guidelines for representing switching losses of SIC MOSFETs in datasheets

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STANDARD published on 9.2.2026


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The information about the standard:

Designation standards: IEC 63602-ed.1.0
Publication date standards: 9.2.2026
SKU: NS-1260471
The number of pages: 15
Approximate weight : 45 g (0.10 lbs)
Country: International technical standard
Category: Technical standards IEC

The category - similar standards:

Transistors

Annotation of standard text IEC 63602-ed.1.0 :

IEC 63602:2026 specifies how to correctly display essential parameters of SiC-based PECS devices having a gate dielectric region biased to turn devices on and off. This typically refers to MOS devices such as MOSFETs and IGBTs. In this document, only NMOS devices are discussed as these are dominant for power device applications; however, the procedures apply to PMOS devices as well. In contrast to silicon power MOSFETs certain aspects of SiC power MOSFETs require a dedicated approach in order to represent device parameters correctly in the datasheet. Details are explained in the following paragraphs, among others the most important topics are: - substantially higher switching speeds ad high VDS; - strong impact of test setup (see Clause 5); - impact of body diode as a function of the applied negative gate bias ant the limitations arising for the VG(off) values depending on the actual device. This document does not define device failure criteria, acceptable use conditions or acceptable lifetime targets. That is up to the device manufacturers and users. However, it provides stress procedures such that the threshold voltage stability over time as affected by gate bias and temperature can be demonstrated and evaluated.

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