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ISO 3951-5:2006
Sampling procedures for inspection by variables — Part 5: Sequential sampling plans indexed by acceptance quality limit (AQL) for inspection by variables (known standard deviation)
Automatically translated name:
Sampling procedures for inspection by variables -- Part 5: Sequential sampling plans indexed by acceptance quality limit (AQL) for inspection by variables (known standard deviation)
STANDARD published on 8.3.2006
The information about the standard:
Designation standards: ISO 3951-5:2006
Publication date standards: 8.3.2006
SKU: NS-431762
The number of pages: 36
Approximate weight : 108 g (0.24 lbs)
Country: International technical standard
Category: Technical standards ISO
The category - similar standards:
Annotation of standard text ISO 3951-5:2006 :
Description / Abstract: ISO 3951-5:2006 specifies a system of sequential sampling plans (schemes) for lot-by-lot inspection by variables. The schemes are indexed in terms of a preferred series of acceptance quality limit (AQL) values, ranging from 0,01 to 10, which are defined in terms of percent nonconforming items. The schemes are designed to be applied to a continuing series of lots. ISO 3951-5:2006 is designed for use under the following conditions: where the inspection procedure is to be applied to a continuing series of lots of discrete products all supplied by one producer using one production process; where only a single quality characteristic of these products is taken into consideration, which must be measurable on a continuous scale; where the uncertainty of the measurement system is negligible with respect to the production process standard deviation; where production is stable (under statistical control) and the quality characteristic is distributed according to a normal distribution (or a close approximation to the normal distribution) or a distribution which may be mathematically transformed to a normal distribution; where the standard deviation of the quality characteristic is known; and where a contract or standard defines an upper specification limit, a lower specification limit or both.
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