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ISO/IEC 18372-ed.1.0
Information technology - RapidIO TM interconnect specification
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STANDARD published on 15.12.2004
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The information about the standard:
Designation standards: ISO/IEC 18372-ed.1.0
Publication date standards: 15.12.2004
SKU: NS-941741
The number of pages: 399
Approximate weight : 1228 g (2.71 lbs)
Country: International technical standard
Category: Technical standards ISO
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Annotation of standard text ISO/IEC 18372-ed.1.0 :
The electronic version of this International Standard can be downloaded from the ISO/IEC Information Technology Task Force (ITTF) web site. The RapidIO architecture was developed to address the need for a high-performance low pin count packet-switched system level interconnect to be used in a variety of applications as an open standard. The architecture is targeted toward networking, telecom, and high performance embedded applications. It is intended primarily as an intra-system interface, allowing chip-to-chip and board-to-board communications at Gigabyte per second performance levels. It provides a rich variety of features including high data bandwidth, low-latency capability and support for high-performance I/O devices, as well as providing globally shared memory, message passing, and software managed programming models.
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