ISO/IEC/TR 5891-ed.1.0

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Annotation of standard text ISO/IEC/TR 5891-ed.1.0 :

ISO/IEC TR 5891:2024 This document surveys and summarizes the existing hardware monitoring methods, including research efforts and industrial applications. The explored monitoring technologies are classified by applied area, carrier type, target entity, objective pattern, and method of deployment. Moreover, this document summarizes the possible ways of utilizing monitoring technologies for hardware security assessment with some existing state-of-the-art security assessment approaches. The hardware mentioned in this document refers only to the core processing hardware, such as the central processing unit (CPU), microcontroller unit (MCU), and system on a chip (SoC), in the von Neumann system and does not include single-input or single-output devices such as memory or displays. The hardware monitoring technology discussed in this document has the following considerations and restrictions: - the monitored target is for the post-silicon phase, not for the design-house phase (e.g. an RTL or netlist design); - monitoring is only applied to the runtime system.